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US 2024/0202129 A1Published application
Swtiching controller, storage device and computing system for improving difference of access latency between memories
AssigneeSK hynix Inc.
InventorMin Ho HA
Life of this patent
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Abstract
A switching controller controlling communication between a processor included in an external device and a memory included in a storage device may pre-fetch memory data into a buffer memory inside the switching controller and provides the data to the processor of the external device based on a command input for a predetermined period.
Claims20
A storage device comprising:
- a plurality of memories;
- and
- a switching controller configured to communicate with each of the plurality of memories and to transmit a command input by a plurality of external devices to at least one of the plurality of memories, each of the plurality of memories including a plurality of storage blocks,
- wherein the switching controller comprises,
- a buffer memory corresponding to at least one of the plurality of external devices, and
- a buffer memory control module configured to select data stored in at least one of the plurality of storage blocks and to store the selected data in the buffer memory, or to delete data stored in the buffer memory, based on the command input for a predetermined period.
3 more elements
A switching controller comprising:
- at least one buffer memory;
- a buffer memory control module configured to select data stored in at least one of a plurality of storage blocks included in each of a plurality of memories and to store the selected data into the at least one buffer memory, or delete data stored in the at least one buffer memory, based on a command for a predetermined period by a plurality of external devices;
- and
- a routing module configured to transmit the command by the plurality of external devices to the plurality of memories or the at least one buffer memory.
1 more element
A computing system comprising:
- a plurality of external devices;
- and
- a storage device including a buffer memory and comprising a plurality of memories and a switching controller for communicating with the plurality of memories and transmitting a command input by the plurality of external devices to at least one of the plurality of memories;
- wherein entire data of a storage block included in at least one of the plurality of memories is stored in the buffer memory based on a command input to the storage device by a first external device of the plurality of external devices, and a part of the entire data stored in the buffer memory is transmitted to a second external device through the switching controller according to a command input to the storage device by the second external device.
1 more element
Dependencies are inferred from the claim text.