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US 2024/0202069 A1Published application
Memory controller and memory system including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung Jin PARK, Sung-Joon Kim, Ho-Young Lee, Kyung-Hee Han
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Abstract
A memory system, a memory controller are provided. The memory system includes: a memory device; and a memory controller configured to: control a patrol scrubbing operation in which data is read from and re-written to the memory device, based on a scrubbing cycle; and adaptively adjust the scrubbing cycle based on a comparison of an error count value of the memory device and a plurality of risk threshold values.
Claims21
A memory system comprising:
- a memory device;
- and
- a memory controller configured to:
- control a patrol scrubbing operation in which data is read from and re-written to the memory device, based on a scrubbing cycle;
- and
- adaptively adjust the scrubbing cycle based on a comparison of an error count value of the memory device and a plurality of risk threshold values.
3 more elements
A memory system comprising:
- a plurality of memory devices;
- and
- a memory controller configured to identify a risk level based on fail information of the plurality of memory devices, set a scrubbing cycle in accordance with the risk level and control a patrol scrubbing operation to be performed at the scrubbing cycle.
A memory controller comprising:
- a non-volatile memory storing fail information;
- and
- a processor configured to control:
- a scrubbing cycle to be set based on the fail information;
- and
- an Error Correction Code (ECC) engine to perform a scrubbing operation in which a bit error of data read from a memory device is detected and corrected, and corrected data is written in the memory device, at the scrubbing cycle.
3 more elements
(canceled)
Dependencies are inferred from the claim text.