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US 2024/0202025 A1Published application
Hybrid virtual gpu co-scheduling
AssigneeIntel Corporation
InventorsYan Zhao, Zhi Wang, Weinan Li
Life of this patent
Estimating the term…
Abstract
An embodiment of a semiconductor package apparatus may include technology to manage one or more virtual graphic processor units, and co-schedule the one or more virtual graphic processor units based on both general processor instructions and graphics processor instructions. Other embodiments are disclosed and claimed.
Claims21
(canceled)
A system, comprising:
- a memory that stores a workload queue associated with a virtual graphics processor unit (vPGU);
- and
- logic communicatively coupled to the memory to:
- identify a semaphore associated with a graphics processing unit,
- determine if the graphics processing unit is active, and
- if the graphics processing unit is determined to be active, append a workload associated with the semaphore to the workload queue.
3 more elements
A semiconductor package apparatus, comprising:
- one or more substrates;
- and
- logic coupled to the one or more substrates, wherein the logic is at least partly implemented in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the one or more substrates to:
- identify a semaphore associated with a graphics processing unit,
- determine if the graphics processing unit is active, and
- if the graphics processing unit is determined to be active, append a workload associated with the semaphore to a workload queue associated with a virtual graphics processor unit (vPGU).
3 more elements
A method comprising:
- identifying a semaphore associated with a graphics processing unit;
- determining if the graphics processing unit is active;
- and
- if the graphics processing unit is determined to be active, appending a workload associated with the semaphore to a workload queue associated with a virtual graphics processor unit (vPGU).
1 more element
Dependencies are inferred from the claim text.