Semiconductor integrated circuit, semiconductor storage device, and memory system
AssigneeKioxia Corporation
InventorKazukuni KITAGAKI
Life of this patent
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Abstract
According to one embodiment, a semiconductor integrated circuit, also referred to as a bridge chip or circuit, has a first interface circuit configured to be connected to a control device and a second interface circuit configured to be connected to a memory chip. A controller in the integrated circuit is configured to transfer a first command sequence for commanding a dummy read operation on a storage region of the memory chip via the second interface circuit before executing a patrol read operation on the storage region of the memory chip based on a request from the control device received via the first interface circuit.
Claims20
A semiconductor integrated circuit, comprising:
- a first interface circuit configured to be connected to a control device;
- a second interface circuit configured to be connected to a memory chip;
- and
- a controller configured to:
- transfer a first command sequence for commanding a dummy read operation on a storage region of the memory chip via the second interface circuit before executing a patrol read operation on the storage region of the memory chip based on a request from the control device received via the first interface circuit.
A semiconductor storage device, comprising:
- a plurality of memory chips;
- and
- a bridge chip including:
- a first interface circuit configured to be connected to a control device;
- and
- a second interface circuit connected to a first group of memory chips in the plurality of memory chips;
- and
- a controller configured to:
- transfer a first command sequence for commanding a dummy read operation on a storage region of a memory chip in the first group via the second interface circuit before executing a patrol read operation on the storage region of the memory chip based on a request from the control device received via the first interface circuit.
A memory system, comprising:
- a control device;
- a bus;
- a plurality of memory chips;
- and
- a plurality of semiconductor integrated circuits, each connected to the control device via the bus and including:
- a first interface circuit connected to the control device via the bus;
- a second interface circuit be connected to a memory chip of the plurality of memory chips;
- and
- a controller configured to transfer a first command sequence for commanding a dummy read operation on a storage region of the memory chip via the second interface circuit before executing a patrol read operation on the storage region of the memory chip based on a request from the control device received via the first interface circuit.
Dependencies are inferred from the claim text.