Method and non-transitory computer-readable storage medium and apparatus for executing host write commands

A non-transitory computer-readable storage medium having stored therein program code that, when loaded and executed by a processing unit, causes the processing unit to.

• provide a sequential-write command queue (SCQ), a random-write command queue (RCQ) and a mark queue, wherein the SCQ stores a plurality of sequential write commands, the RCQ stores a plurality of random write commands, the mark queue comprises a record indicating that a conflicting sequential write command and/or a conflicting random write command needs to be processed in advance;
• when a specific condition is met, obtain a first logical address range carried in the conflicting sequential write command and second logical address ranges carried in the sequential write commands earlier than the conflicting sequential write command from the SCQ, and/or a third logical address range carried in the conflicting random write command and fourth logical address ranges carried in the random write commands earlier than the conflicting random write command from the RCQ according to content of the record;
• read user data of the first logical address range from a first address of a random access memory (RAM) and user data of the second logical address ranges from second addresses of the RAM, and/or user data of the third logical address range from a third address of the RAM and user data of the fourth logical address ranges from fourth addresses of the RAM;
• and
• program the user data of the first logical address range and the second logical address ranges, and/or the user data of the third logical address range and the fourth logical address ranges into a flash module.

An apparatus for executing host write commands, comprising:

• a flash interface (I/F), coupled to a flash module;
• a random access memory (RAM), arranged operably to:
• allocate space for a sequential-write command queue (SCQ), a random-write command queue (RCQ) and a mark queue, wherein the SCQ stores a plurality of sequential write commands, the RCQ stores a plurality of random write commands and the mark queue comprises a record indicating that a conflicting sequential write command and/or a conflicting random write command needs to be processed in advance;
• and
• a processing unit, coupled to the RAM and the flash I/F, arranged operably to:
• when a specific condition is met, obtain a first logical address range carried in the conflicting sequential write command and second logical address ranges carried in the sequential write commands earlier than the conflicting sequential write command from the SCQ, and/or a third logical address range carried in the conflicting random write command and fourth logical address ranges carried in the random write commands earlier than the conflicting random write command from the RCQ according to content of the record;
• read user data of the first logical address range from a first address of the RAM and user data of the second logical address ranges from second addresses of the RAM, and/or user data of the third logical address range from a third address of the RAM and user data of the fourth logical address ranges from fourth addresses of the RAM;
• and drive the flash I/F to program the user data of the first logical address range and the second logical address ranges, and/or the user data of the third logical address range and the fourth logical address ranges into the flash module.