Memory system and method
AssigneeKioxia Corporation
InventorsAtsuo SHONO, Kiyotaka IWASAKI
Life of this patent
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AssigneeKioxia Corporation
InventorsAtsuo SHONO, Kiyotaka IWASAKI
Estimating the term…
According to an embodiment, a memory system includes a memory controller. At a first timing within a period from allocation of an area unit to completion of a data-in operation on the data unit stored in an area unit, the memory controller deallocates the area unit upon the completion of the data-in operation on the data unit when a usage of a buffer area is smaller than a first threshold value. At the first timing, the memory controller deallocates the area unit upon completion of the program operation on the data unit when the usage of the buffer area is larger than a second threshold value. The second threshold value is larger than the first threshold value.
A memory system connectable to a host, the memory system comprising:
A method of controlling a first memory, the first memory being a non-volatile memory and including a memory cell array that includes a plurality of memory cells, the method comprising:
Dependencies are inferred from the claim text.