Method for implementing an i/o buffer
AssigneeXilinx, Inc.
InventorsSasi Rama Subrahmanyam LANKA, Vss Prasad Babu AKURATHI, Hari Bilash DUBEY
Life of this patent
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Abstract
An input/output (I/O) buffer is implemented without an auxiliary power supply (VCCAUX). The input/output (I/O) buffer includes a connection to a VCCO power supply, a connection to a VCCINT power supply, a connection to a reference voltage, and a VCCO detection circuit coupled to a bias generation circuit. Further, the I/O buffer includes a transmitter circuit coupled to the bias generation circuit, and a receiver circuit coupled to an I/O pad.
Claims20
An input/output (I/O) buffer comprising:
- a connection to a VCCO power supply;
- a connection to a VCCINT power supply;
- a connection to a reference voltage;
- a VCCO detection circuit coupled to a bias generation circuit;
- a transmitter circuit coupled to the bias generation circuit, the transmitter circuit having a single-stage level-shifter circuit, wherein the VCCO detection circuit is coupled to the single-stage level-shifter circuit through the bias generation circuit such that core power domain data is level-shifted to a VCCO I/O buffer power domain;
- and
- a receiver circuit coupled to an I/O pad.
An input/output (I/O) buffer comprising:
- a connection to a VCCO power supply;
- a connection to a VCCINT power supply;
- a connection to a reference voltage;
- a data input coupled to a control logic circuit;
- a plurality of control signals coupled to the control logic circuit;
- a single-stage level-shifter circuit;
- pre-driver circuits coupled to the single-stage level-shifter circuit;
- driver circuits coupled to the pre-driver circuits;
- a bias generation circuit coupled to the driver circuits;
- a VCCO detection circuit coupled to the single-stage level-shifter circuit through the bias generation circuit such that core power domain data is level-shifted to a VCCO I/O buffer power domain;
- and
- a receiver circuit coupled to an I/O pad.
A method for implementing an input/output (I/O) buffer comprising:
- connecting to a VCCO power supply;
- connecting to a VCCINT power supply;
- receiving a reference voltage (REF) in a VCCO detection circuit;
- transmitting VCCO detect signals from the VCCO detection circuit to a bias generation circuit;
- receiving bias voltages in a transmitter circuit from the bias generation circuit, the transmitter circuit having a single-stage level-shifter circuit, wherein the VCCO detection circuit is coupled to the single-stage level-shifter circuit through the bias generation circuit;
- and
- receiving data in a receiver from an I/O pad.
Dependencies are inferred from the claim text.