Time-to-digtial converter circuit with self-testing function
AssigneeSTMicroelectronics International N.V.
InventorsJohn Kevin Moore, Gavin Stuart Ball
Life of this patent
Estimating the term…
Abstract
A time-to-digital converter (TDC) circuit with self-testing function includes: a D flip-flop, where an input terminal of the D flip-flop is configured to be coupled to a data signal, and a clock terminal of the D flip-flop is configured to be coupled to a clock signal; and an AND gate, where a first input terminal of the AND gate is configured to be coupled to an enable signal of the TDC circuit, a second input terminal of the AND gate is configured to be coupled to a test signal, and an output terminal of the AND gate is coupled to a control terminal of the D flip-flop.
Claims20
A time-to-digital converter (TDC) circuit with self-testing function, the TDC circuit comprising:
- a D flip-flop, wherein an input terminal of the D flip-flop is configured to be coupled to a data signal, and a clock terminal of the D flip-flop is configured to be coupled to a clock signal;
- and
- an AND gate, wherein a first input terminal of the AND gate is configured to be coupled to an enable signal of the TDC circuit, a second input terminal of the AND gate is configured to be coupled to a test signal, and an output terminal of the AND gate is coupled to a control terminal of the D flip-flop.
A time-to-digital converter (TDC) circuit with self-testing function, the TDC circuit comprising:
- a sampling stage comprising:
- first plurality of D flip-flops, wherein first input terminals of the first plurality of D flip-flops are configured to be coupled to a data signal, wherein first clock terminals of the first plurality of D flip-flops are configured to be coupled to respective ones of a plurality of clock signals, wherein the plurality of clock signals have a same frequency but different phases;
- and
- a plurality of AND gates, wherein first input terminals of the plurality of AND gates are configured to be coupled to an enable signal, wherein second input terminals of the plurality of AND gates are configured to be coupled to respective ones of a plurality of test signals, wherein output terminals of the plurality of AND gates are coupled to respective ones of control terminals of the first plurality of D flip-flops.
A method of operating a time-to-digital converter (TDC) circuit having a self-testing function, the method comprising:
- in a self-test mode of the TDC circuit, operating the TDC circuit by:
- keeping an input terminal of a D flip-flop in an input stage of the TDC circuit in a logic low state;
- sending a clock signal to a clock terminal of the D flip-flop;
- keeping an enable signal at a first input terminal of an AND gate in a logic high state, wherein an output terminal of the AND gate is coupled to a control terminal of the D flip-flop;
- and
- generating a pulse at a second input terminal of the AND gate at a pre-determined time instant.
Dependencies are inferred from the claim text.