Cryogenic superconductive electronic assembly

A cryogenic superconductive memory array, comprising:

• an electrode substrate;
• a ferroelectric (FE) layer carried by the electrode substrate;
• a plurality of superconducting quantum interference devices (SQUIDs) residing on the FE layer;
• and
• a plurality of heater cryotron devices situated adjacent the superconducting quantum interference devices, adjacent heater cryotron devices and superconducting quantum interference devices exhibit a series arrangement with respect to each other;
• wherein, in order to execute read and write operations of the cryogenic superconductive memory array, a polarization state of the FE layer is switchable between first and second polarization states via application of a voltage input across the FE layer.

A cryogenic superconductive electronic assembly, comprising:

• a cryogenic superconductive logic gate assembly, comprising a first electrode substrate;
• a first ferroelectric (FE) layer carried by the first electrode substrate, the first FE layer exhibiting a first polarization state or a second polarization state based upon application of a voltage input across the first FE layer;
• at least one first superconducting quantum interference device (SQUID) residing on the first FE layer;
• and a first heater cryotron device situated adjacent the at least one first superconducting quantum interference device;
• wherein a superconducting state of the at least one first superconducting quantum interference device is effected at the first polarization state of the first FE layer, constituting a logic state zero (0) of the cryogenic superconductive logic gate assembly, and a nonsuperconducting state of the at least one first superconducting quantum interference device is effected at the second polarization state of the first FE layer, constituting a logic state one (1) of the cryogenic superconductive logic gate assembly;
• and
• a cryogenic superconductive memory array, comprising:
• a second electrode substrate;
• a second ferroelectric (FE) layer carried by the second electrode substrate;
• a plurality of second superconducting quantum interference devices (SQUIDs) residing on the second FE layer;
• and a plurality of second heater cryotron devices situated adjacent the second superconducting quantum interference devices, adjacent second heater cryotron devices and second superconducting quantum interference devices exhibit a series arrangement with respect to each other;
• wherein, in order to execute read and write operations of the cryogenic superconductive memory array, a polarization state of the second FE layer is switchable between first and second polarization states via application of a voltage input across the second FE layer.