EMBEDDED ReRAM WITH BACKSIDE CONTACT
AssigneeInternational Business Machines Corporation
InventorsMin Gyu Sung, Julien Frougier, Ruilong Xie, Chanro Park, Juntao Li, Soon-Cheon Seo, Takashi Ando, Chen Zhang, Heng Wu
Life of this patent
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Abstract
A semiconductor structure including a one-transistor one-capacitor (1T1R) device is provided that includes an embedded resistive random access memory (ReRAM) having a width larger than 1 gate pitch, that is present in a frontside or the backside of the structure, a frontside contact structure electrically connected to a source region of the transistor of the 1T1R device and a backside contact structure electrically connected to a drain region of the transistor of the 1T1R device.
Claims20
A semiconductor structure comprising:
- a transistor located in a memory device region and comprising a gate structure, a source region located on a first side of the gate structure, and a drain region located on a second side of the gate structure, wherein the second side of the gate structure is opposite the first side of the gate structure;
- a resistive random access memory (ReRAM) located in the memory device region and positioned above the transistor;
- a frontside contact structure electrically connecting the ReRAM to the source region of the transistor;
- and
- a backside contact structure electrically connecting the drain region of the transistor to a backside back-end-of-the-line (BEOL) structure.
A semiconductor structure comprising:
- a transistor located in a memory device region and comprising a gate structure, a source region located on a first side of the gate structure, and a drain region located on a second side of the gate structure, wherein the second side of the gate structure is opposite the first side of the gate structure;
- a resistive random access memory (ReRAM) located in the memory device region and positioned beneath the transistor;
- a frontside contact structure electrically connecting the source region of the transistor to a frontside back-end-of-the-line (BEOL) structure;
- and
- a backside contact structure electrically connecting the drain region of the transistor to the ReRAM.
Dependencies are inferred from the claim text.