Memory device and manufacturing method thereof

A memory device comprising:

• a substrate;
• a plurality of channel layers formed over the substrate and forming an array expanding in a first direction and a second direction different from each other and parallel to a surface of the substrate;
• a plurality of gate dielectric layers each surrounding one of the channel layers;
• a plurality of gate layers arranged along the first direction, each of the gate layers continuously extending approximately along the second direction and surrounding one column of the channel layers;
• and
• a plurality of spacers arranged along the first direction, each of the spacers extending approximately along the second direction and separating neighboring ones of the gate layers.

A memory system comprising:

• a memory device including:
• a substrate;
• a plurality of channel layers formed over the substrate and forming an array expanding in a first direction and a second direction different from each other and parallel to a surface of the substrate;
• a plurality of gate dielectric layers each surrounding one of the channel layers;
• a plurality of gate layers arranged along the first direction, each of the gate layers continuously extending approximately along the second direction and surrounding one column of the channel layers;
• and
• a plurality of spacers arranged along the first direction, each of the spacers extending approximately along the second direction and separating neighboring ones of the gate layers;
• and
• a memory controller coupled to the memory device and configured to control operation of the memory device.