Low noise ring oscillator devices and methods
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYung-Shun Chen, Amit KUNDU, Yung-Chow Peng
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Abstract
A device including delay cells connected in series and in a feedback loop to provide a ring oscillator. At least one of the delay cells in the ring oscillator is a stacked gate delay cell that includes two or more PMOS transistors having first drain/source paths connected in series to each other and having first gates connected to each other and two or more NMOS transistors having second drain/source paths connected in series to each other and to the first drain/source paths and having second gates connected to each other and to the first gates.
Claims20
A device, comprising:
- delay cells connected in series and in a feedback loop to provide a ring oscillator,
- wherein at least one of the delay cells in the ring oscillator is a stacked gate delay cell that includes:
- two or more PMOS transistors having first drain/source paths connected in series to each other and having first gates connected to each other;
- and
- two or more NMOS transistors having second drain/source paths connected in series to each other and to the first drain/source paths and having second gates connected to each other and to the first gates.
A device, comprising:
- delay cells connected in series and in a feedback loop to provide a ring oscillator,
- wherein at least one of the delay cells includes at least one PMOS transistor having a first drain/source path and at least one NMOS transistor having a second drain/source path connected to the first drain/source path, first gates of the at least one PMOS transistor and the at least one NMOS transistor connected to each other, and
- the at least one of the delay cells includes a pseudo load PMOS transistor having drain and source regions connected to each other and to the first drain/source path and a pseudo load NMOS transistor having drain and source regions connected to each other and to the second drain/source path, second gates of the pseudo load PMOS transistor and the pseudo load NMOS transistor connected to each other and to the first gates.
A method, comprising:
- providing a ring oscillator including a plurality of delay cells connected in series and in a feedback loop;
- connecting a pseudo load to at least one of the delay cells;
- and
- selectively varying the pseudo load.
Dependencies are inferred from the claim text.