US 2024/0178167 A1 · CHIP PACKAGE STRUCTURE AND METHOD FOR PREPARING CHIP PACKAGE STRUCTURE

Abstract

The invention provide a chip package structure, which includes a first chip and a first hybrid bonding structure. The first chip is connected to another chip through the first hybrid bonding structure. The first hybrid bonding structure includes a first bonding layer. The first bonding layer is disposed on a side away from a substrate of the first chip, and the first bonding layer includes a first insulation material and a plurality of first metal solder pads embedded in the first insulation material. Each of the plurality of first metal solder pads includes a groove structure. A groove bottom of the groove structure is buried in the first insulation material, and a groove opening of the groove structure is exposed to a surface of the first insulation material and is flush with the surface of the first insulation material.

Claims13

Dependent claims

A chip package structure, comprising a first chip and a first hybrid bonding structure, wherein the first chip is connected to another chip through the first hybrid bonding structure;

the first hybrid bonding structure comprises a first bonding layer, the first bonding layer is disposed on a side away from a substrate of the first chip, and the first bonding layer comprises a first insulation material and a plurality of first metal solder pads embedded in the first insulation material;
each of the plurality of first metal solder pads comprises a groove structure, a groove bottom of the groove structure is buried in the first insulation material, and a groove opening of the groove structure is exposed to a surface of the first insulation material and is flush with the surface of the first insulation material;
and
the groove structure is filled with a first insulation medium, and a surface of the first insulation medium is flush with the surface of the first insulation material.

1 more element

A method for preparing a chip package structure, comprising:

forming a first insulation material on an active surface of a first chip;
etching the first insulation material to form a plurality of grooves;
depositing a metal material on a surface of the first insulation material, wherein the metal material forms a groove structure in the grooves;
depositing a first insulation medium on a surface of the metal material;
and
performing planarization processing on the first insulation medium, the metal material, and the first insulation material through a polishing process, to form a first bonding layer, wherein
the first bonding layer comprises a plurality of first metal solder pads, each of the plurality of first metal solder pads comprises the groove structure, a groove opening of the groove structure is exposed to the surface of the first insulation material and is flush with the surface of the first insulation material, and a surface of the first insulation medium is flush with the surface of the insulation material.

4 more elements

Dependencies are inferred from the claim text.

Chip package structure and method for preparing chip package structure

Life of this patent

Chip package structure and method for preparing chip package structure

Life of this patent

Abstract

Claims13