Self-selecting memory device, memory system having the same, and operating method thereof

A self-selecting memory device, comprising:

• word-lines;
• bit-lines;
• and
• a plurality of memory cells connected between the word-lines and the bit-lines,
• wherein each of the plurality of memory cells stores data in one of a first state indicating a crystallization state and a second state indicating an amorphous state,
• wherein a polarity direction of a second write pulse applied to a corresponding word-line and a corresponding bit-line when data is stored in the second state and a polarity direction of a first write pulse applied to a corresponding word-line and a corresponding bit-line when data is stored in the first state are substantially opposite to each other,
• wherein a pulse width of the second write pulse is shorter than a pulse width of the first write pulse.

A memory system, comprising:

• at least one self-selecting memory device;
• and
• a controller configured to control the at least one self-selecting memory device,
• wherein the at least one self-selecting memory device adjusts a crystalline phase of a memory cell by changing a shape of the write pulse when a write voltage is applied,
• wherein polarities of the write pulse and a read pulse are different according to a first state indicating a crystalline state and a second state indicating an amorphous.