Method and device for matrix multiplication optimization using vector registers

An apparatus comprising:

• a memory storing a set of instructions;
• and
• one or more processors configured to execute the set of instruction to cause the apparatus to perform:
• receiving a matrix of a neural network model;
• classifying at least a first portion of the matrix as a first section based on a first distribution pattern of non-zero elements of the portion of the matrix;
• identifying memory addresses of the non-zero elements in the first section of the matrix for loading, according to a first order determined based on the first distribution pattern, the non-zero elements in the first section into one or more vector registers;
• wherein identifying the memory addresses of the non-zero elements in the first section of the matrix for loading, according to a first order determined based on the first distribution pattern, the non-zero elements in the first section into one or more vector registers further comprises:
• identifying the memory addresses of the non-zero elements in a second row of the first section of the matrix for loading the non-zero elements in the second row into a second vector register of the one or more vector registers.

A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computer to cause the computer to perform a method, the method comprising:

• receiving a matrix of a neural network model;
• classifying at least a first portion of the matrix as a first section based on a first distribution pattern of non-zero elements of the portion of the matrix;
• identifying memory addresses of the non-zero elements in the first section of the matrix for loading, according to a first order determined based on the first distribution pattern, the non-zero elements in the first section into one or more vector registers;
• wherein identifying the memory addresses of the non-zero elements in the first section of the matrix for loading, according to a first order determined based on the first distribution pattern, the non-zero elements in the first section into one or more vector registers further comprises:
• identifying the memory addresses of the non-zero elements in a second row of the first section of the matrix for loading the non-zero elements in the second row into a second vector register of the one or more vector registers.