Apparatuses and methods for timing skew calibration

An apparatus comprising:

• an analog-to-digital conversion circuit configured to sample an input signal based on a clock signal and convert the sampled input signal into a digital code;
• a skew detection circuit configured to receive the digital code from the analog-to-digital conversion circuit, calculate a first sum of variances for respective levels of the digital code, compare the first sum of the variances with a previously calculated second sum of variances, and select a smaller value from among the first sum and the second sum;
• and
• a compensation circuit configured to compensate for a skew of the clock signal based on a selected smaller value from among the first sum and the second sum.

An apparatus comprising:

• a time interleaved analog-to-digital converter (TIADC) comprising at least one switch that is configured to sample an input signal based on a clock signal and one or more analog-to-digital converter (ADC) that is configured to convert the sampled input signal into a digital code;
• a sigma monitor configured to calculate a first sum of standard deviations for respective levels of the digital code;
• a decision logic configured to receive the sum of the standard deviations from the sigma monitor, compare the first sum of the standard deviations with a previously calculated second sum of standard deviations, and select a smaller value from among the first sum and the second sum;
• and
• a compensation circuit configured to compensate for a skew of the clock signal based on a selected smaller value from among the first sum and the second sum.