Changing precision of operands
AssigneeNVIDIA Corporation
InventorsJiqun Tu, David Maxwell Clark
Life of this patent
Estimating the term…
Abstract
Apparatuses, systems, and techniques to perform matrix multiply-accumulate (MMA) operations on data of a first type using one or more MMA instructions for data of a second type. In at least one embodiment, a single tensorfloat-32 (TF32) MMA instruction computes a 32-bit floating point (FP32) output using TF32 input operands converted from FP32 data values.
Claims56
A processor comprising:
- one or more circuits to transform one or more operands of a first datatype to one or more operands of a second datatype and causing a matrix multiply-accumulate (MMA) operation to be performed on the one or more operands of the second datatype.
A system comprising:
- one or more processors to convert one or more operands of a first datatype to one or more operands of a second datatype and causing a matrix multiply-accumulate (MMA) operation to be performed on the one or more operands of the second datatype.
A machine-readable medium having stored thereon one or more instructions, which if performed by one or more processors, cause the one or more processors to at least:
- change one or more operands of a first datatype to one or more operands of a second datatype and causing a matrix multiply-accumulate (MMA) operation to be performed on the one or more operands of the second datatype.
A method comprising:
- transforming one or more operands of a first datatype to one or more operands of a second datatype and causing a matrix multiply-accumulate (MMA) operation to be performed on the one or more operands of the second datatype.
A processor comprising:
- one or more circuits to convert one or more thirty-two bit floating point (FP32) operands to one or more tensorflow32 (TF32) operands and cause a matrix-multiply-accumulate (MMA) operation to be performed on the one or more TF32 operands.
A system comprising:
- one or more processors to convert one or more thirty-two bit floating point (FP32) operands to one or more tensorflow32 (TF32) operands and cause a matrix-multiply-accumulate (MMA) operation to be performed on the one or more TF32 operands.
A machine-readable medium having stored thereon one or more instructions, which if performed by one or more processors, cause the one or more processors to at least:
- convert one or more thirty-two bit floating point (FP32) operands to one or more tensorflow32 (TF32) operands and cause a matrix-multiply-accumulate (MMA) operation to be performed on the one or more TF32 operands.
A method comprising:
- converting one or more thirty-two bit floating point (FP32) operands to one or more tensorflow32 (TF32) operands and causing a matrix-multiply-accumulate (MMA) operation to be performed on the one or more TF32 operands.
Dependencies are inferred from the claim text.