Apparatuses, systems, and methods for module level error correction
AssigneeMicron Technology, Inc.
InventorSujeet Ayyapureddi
Life of this patent
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Abstract
Apparatuses, systems, and methods for module level error correction. Multiple memory devices a packaged together in a memory module. The module includes a module error correction code (ECC) circuit which pools information multiple memory devices on the module. In an example read operation, multiple memory devices each provide a codeword which includes data bits and parity bits. The codewords may include data bits provided along a data bus and parity bits provided along a parity bus. The ECC circuit pools the codewords and detects errors in the pooled codewords.
Claims19
An apparatus comprising:
- a first memory device including a mode register;
- module logic including a module settings register;
- and
- a plurality of data bus lines coupling the first memory device to the module logic, wherein a signaling protocol used to carry data between the module logic and the first memory device along the plurality of data bus lines is selected based on the mode register and the module settings register.
An apparatus comprising:
- a plurality of memory devices each configured to provide a respective one of a plurality of codewords as part of an access operation;
- and
- module logic including:
- a module error correction code (ECC) circuit configured to detect errors in the plurality of codewords when enabled;
- a module settings register configured to store a module ECC enable value, wherein the ECC circuit is enabled based on the module ECC enable value;
- and
- a plurality of data buses each configured to couple a respective one of the plurality of memory devices to the module logic, wherein each of the plurality of codewords includes data bits and wherein the plurality of data buses are configured to carry the data bits,
- wherein the module settings register includes at least one signaling protocol value, and wherein a signaling protocol along the plurality of data buses is selected based on the at least one signaling protocol value.
11-12. (canceled)
A method comprising:
- selecting a signaling protocol based on a setting in the module settings register;
- receiving a plurality of codewords each from a respective one of a plurality of memory devices using the selected signaling protocol;
- enabling a module error correction code (ECC) circuit based on a setting in a module settings register;
- and
- detecting errors in the plurality of codewords with the ECC circuit when the ECC is enabled.
(canceled)
Dependencies are inferred from the claim text.