Readout from memory cells subjected to perturbations in threshold voltage distributions
AssigneeApple Inc.
InventorsNir Tishbi, Roy Roth, Yonathan Tate
Life of this patent
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AssigneeApple Inc.
InventorsNir Tishbi, Roy Roth, Yonathan Tate
Estimating the term…
A memory controller includes an interface and a processor. The interface is configured to communicate with a plurality of memory cells. The processor is configured to, using multiple Read Thresholds (RTs) positioned between adjacent Programming Voltages (PVs), produce (i) a base parametric model of Threshold Voltage Distributions (TVDs) associated with the PVs, and (ii) auxiliary information that depends on the RTs and on the base parametric model, to read a group of the memory cells using the RTs to produce multiple readouts, the threshold voltages of the memory cells in the group are distributed in accordance with actual TVDs, to derive from the base parametric model an actual parametric model, based on the multiple readouts and on the auxiliary information, and determine a readout parameter based on the actual parametric model, and to perform a read-related operation using the readout parameter.
A memory controller, comprising:
A method for data storage, comprising:
Dependencies are inferred from the claim text.