Dual Mode Current and Temperature Sensing for SiC Devices
AssigneeInfineon Technologies AG
InventorsDethard Peters, Sascha Axel Baier, Tomas Reiter, Sandeep Walia, Frank Wolter
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AssigneeInfineon Technologies AG
InventorsDethard Peters, Sascha Axel Baier, Tomas Reiter, Sandeep Walia, Frank Wolter
Estimating the term…
A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source regions of the current sense transistor. The doped resistor region has an opposite conductivity type as the source regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.
A semiconductor die, comprising:
A method of current and temperature sensing for a semiconductor die that includes a power transistor and a current sense transistor integrated in a SiC substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having an opposite conductivity type as source regions of both of the transistors and being configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal, the method comprising:
An electronic system for sensing current and temperature of a semiconductor die that includes a power transistor and a current sense transistor integrated in a SiC substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having an opposite conductivity type as source regions of both of the transistors and being configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal, the electronic system comprising:
Dependencies are inferred from the claim text.