Semiconductor package

A semiconductor package comprising:

• a first semiconductor chip including rear pads, front pads, and through-electrodes electrically connecting the rear pads and the front pads;
• a second semiconductor chip on the first semiconductor chip and including first connection pads electrically connected to the front pads of the first semiconductor chip and second connection pads around the first connection pads, wherein the second semiconductor has a width greater than that of the first semiconductor chip;
• a redistribution structure below the first semiconductor chip and including first redistribution layers electrically connecting the rear pads of the first semiconductor chip and second redistribution layers around the first redistribution layers;
• and
• metal posts around the first semiconductor chip, extending between the redistribution structure and the second semiconductor chip, and electrically connecting the second connection pads of the second semiconductor chip and the second redistribution layers of the redistribution structure,
• wherein the metal posts include an arrangement of first metal posts spaced apart around the first semiconductor chip, and an arrangement of second metal posts spaced apart around the arrangement of first metal posts, and
• each of the first metal posts includes a portion having a width greater than a width of each of the second metal posts.

A semiconductor package comprising:

• a first semiconductor chip including rear pads, front pads, and through-electrodes electrically connecting the rear pads and the front pads;
• a second semiconductor chip on the first semiconductor chip and including first connection pads electrically connected to the front pads of the first semiconductor chip and second connection pads around the first connection pads, wherein the second semiconductor chip has a width greater than a width of the first semiconductor chip;
• a redistribution structure below the first semiconductor chip and including first redistribution layers electrically connected to the rear pads of the first semiconductor chip, and second redistribution layers around the first redistribution layers;
• and
• metal posts around the first semiconductor chip, extending between the redistribution structure and the second semiconductor chip, and electrically connecting the second connection pads of the second semiconductor chip and the second redistribution layers of the redistribution structure,
• wherein the metal posts include at least one first metal post more closely disposed in relation to the first semiconductor chip, and at least one second metal post more distantly disposed in relation to the first semiconductor chip,
• the at least one first metal post includes a first portion and a second portion on the first portion, and
• a distance between the first portion of the first metal post and a side surface of the first semiconductor chip is greater than a distance between the second portion of the first metal post and a side surface of the first semiconductor chip.