Method for manufacturing high dielectric constant metal gate for nmos and pmos

A method for manufacturing a metal gate having a high dielectric constant for NMOS and PMOS, wherein the method comprises following steps:

• step 1:
• providing a semiconductor substrate, and forming an interface layer on a surface of the semiconductor substrate, wherein the interface layer is disposed in a region for forming a gate structure of the NMOS and a gate structure of the PMOS, wherein the interface layer comprises an oxide layer, wherein the oxide layer is formed by oxidizing the surface of the semiconductor substrate;
• wherein the NMOS and the PMOS are integrated on the semiconductor substrate;
• and
• wherein the NMOS comprises a first NMOS device, wherein the PMOS comprise a first PMOS device, wherein the first NMOS device and the first PMOS device are configured to be adjacent to each other and to share the metal gate, and wherein a gate structure of the first NMOS device and a gate structure of the first PMOS device share a first gate formation region;
• step 2, forming a high dielectric constant layer on a surface of the interface layer;
• step 3, performing a decoupled plasma nitridation process to dope the high dielectric constant layer with nitrogen;
• step 4, performing post nitridation annealing on the high dielectric constant layer, wherein a post nitridation anneal temperature is configured to set below a preset first temperature, so as to reduce the number of oxygen vacancies in the high dielectric constant layer;
• a lower temperature of the post nitridation anneal corresponds to a smaller number of oxygen vacancies in the high dielectric constant layer;
• wherein the preset first temperature is set according to a maximum offset value of a threshold voltage of the first PMOS device, wherein if the maximum offset value of the threshold voltage of the first PMOS device is smaller, the preset first temperature becomes lower;
• step 5, forming a P-type work function metal layer, wherein the P-type work function metal layer is formed in the region for both of the gate structures of the NMOS and the PMOS;
• step 6, removing the P-type work function metal layer from the gate structure of the NMOS, and retaining the P-type work function metal layer in the gate structure of the PMOS;
• step 7, forming an N-type work function metal layer, wherein the N-type work function metal layer is formed in the gate structures of the NMOS the PMOS;
• wherein the N-type work function metal layer is stacked on a top surface of the P-type work function metal layer in the gate structure of the PMOS;
• wherein in the first gate formation region, a first side surface of the P-type work function metal layer forms an interface between the P-type and N-type work function metal layers over the PMOS, wherein as the N-type work function metal layer over the NMOS extends across the interface to the top surface of the P-type work function metal layer over the PMOS, lateral diffusion of metal atoms occurs at the interface from the N-type work function metal layer to the P-type work function metal layer, wherein the laterally diffused metal atoms replace spots of oxygen vacancies the in the high dielectric constant layer, wherein one of the metal atoms forms a dipole with a metal atom in the P-type work function metal layer, thus reducing a work function value of the P-type work function metal layer and increasing the threshold voltage of the first PMOS device;
• and
• wherein a number of the dipoles is reduced by reducing the number of the oxygen vacancies in the high dielectric constant layer in step 4, so that an offset value of the threshold voltage of the first PMOS device is determined by the number of the oxygen vacancies in the high dielectric constant layer;
• and
• step 8, forming the metal gate in the same region of the gate structure of the NMOS and the gate structure of the PMOS, wherein in the first gate formation region, the metal gate extends from the gate structure of the first NMOS device to the gate structure of the first PMOS device.