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US 2023/0420057 A1Published application
Memory control method
AssigneeDenso Corporation
InventorNao UEMATSU
Life of this patent
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Abstract
A memory control method includes: writing data in at least one page that is a part of a plurality of logical sectors; erasing the data in at least one of the plurality of logical sectors; and controlling an operation for write and erasure in a memory to which an erasure voltage is applied in a physical sector including the plurality of logical sectors; and performing batch erasure for each of a plurality of logically divided physical sectors obtained by logically dividing the physical sector into at least two sectors.
Claims6
A memory control method, wherein
- a physical sector is placed on a p-well on a silicon substrate,
- the physical sector includes a plurality of logical sectors connected to a wordline,
- the method includes:
- writing data in at least one page that is a part of the plurality of logical sectors;
- erasing the data in at least one of the plurality of logical sectors;
- and
- controlling an operation for write and erasure in a memory to which an erasure voltage is applied in the physical sector;
- and
- performing batch erasure for each of a plurality of logically divided physical sectors obtained by logically dividing the physical sector into at least two sectors.
6 more elements
Dependencies are inferred from the claim text.