Application processors and electronic devices including the same
AssigneeSamsung Electronics Co., Ltd.
InventorKyumin Park
Life of this patent
Estimating the term…
Abstract
An application processor includes a memory interface and a memory controller. The memory interface is connected to a semiconductor memory device through first data input/output (U/O) pads and second data I/O pads. The memory controller exchanges data with the semiconductor memory device by controlling the memory interface. The memory interface includes a training circuit to perform duty training of first data signals and second data signals by adjusting a duty of each of the first data signals with respect to a first reference voltage and adjusting a duty of each of the second data signals with respect to a second reference voltage.
Claims20
A data receiving interface comprising:
- a first data receiving circuit comprising a first differential amplifier and a first data sampler, wherein.
- the first differential amplifier outputs a first differential signal reflecting a difference between a first received data signal and a reference voltage having a fixed value,
- the first differential amplifier comprises a first duty-period adjustment circuit that varies a first duty period of the first differential signal, and
- the first data sampler outputs a first output signal reflecting a value of the first differential signal at a sample time.
An application processor comprising:
- a memory interface connected to a semiconductor memory device through a first data input/output (I/O) pad and a second data I/O pad,
- wherein the memory interface includes a training circuit configured to perform duty training of a first data signal and a second data signal, based on a reception control code set, by:
- adjusting a duty of the first data signal with respect to a first reference voltage, the first data signal received through the first data I/O pad;
- and
- adjusting a duty of the second data signal with respect to a second reference voltage, the second data signal received through the second data I/O pad.
A semiconductor package including an application processor and one or more stacked memory devices, the semiconductor package comprising:
- the application processor comprising:
- a memory interface connected to the one or more stacked memory devices through first data input/output (I/O) pads and second data I/O pads;
- and
- a memory controller configured to exchange data with the one or more stacked memory devices by controlling the memory interface, wherein:
- the memory interface includes a training circuit configured to perform duty training of first data signals and second data signals which are based on the data, based on a reception control code set, by:
- adjusting a duty of each of the first data signals with respect to a first reference voltage, the first data signals received through the first data I/O pads;
- and
- adjusting a duty of each of the second data signals with respect to a second reference voltage, the second data signals received through the second data I/O pads.
Dependencies are inferred from the claim text.