Fast fourier transform (fft) butterfly circuit for a dynamically reconfigurable oversampled channelizer

A method for computing a fast Fourier transform (FFT) butterfly, the method comprising:

• selecting, by a first multiplexer, one of a first channel or a delayed version of a second channel, the selection based on a frame index associated with the first channel and/or the second channel;
• selecting, by a second multiplexer, the one of the first channel or the delayed version of the second channel that was not selected by the first multiplexer;
• routing a delayed version of the selected channel from the first multiplexer to a top butterfly branch of a butterfly core circuit;
• routing the selected channel from the second multiplexer to a bottom butterfly branch of the butterfly core circuit;
• selecting FFT twiddle factors, the selection based on a size of an FFT for which the FFT butterfly is computed;
• applying, by the butterfly core circuit, the FFT twiddle factors to the bottom butterfly branch to generate a scaled bottom butterfly branch;
• and
• generating, by the butterfly core circuit, a sum channel output as the sum of the top butterfly branch and the scaled bottom butterfly branch, and a difference channel output as the difference between the top butterfly branch and the scaled bottom butterfly branch.