Integrated circuit, chip, and electronic device
AssigneeHuawei Technologies Co., Ltd.
InventorsYan Zhao, Ke Zhang, Yu Liang, Jian Zhang, Nan Li
Life of this patent
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Abstract
This disclosure provides an integrated circuit, a chip, and an electronic device. The chip includes D dice, where D is a positive integer greater than or equal to 2, the D dice include a first die and a second die, and the first die and the second die are rotationally symmetrical.
Claims20
A chip, wherein the chip comprises D dice, D is a positive integer greater than or equal to 2, the D dice comprise a first die and a second die, the first die comprises a first tile array, the second die comprises a second tile array, and an arrangement of the first tile array on the first die and an arrangement of the second tile array on the second die are rotationally symmetrical.
An integrated circuit, comprising:
- N rows and M columns of tiles, and each tile in the N rows and M columns of tiles comprises:
- a first interface, a second interface, a third interface, and a fourth interface;
- N groups of first buses and M groups of second buses, wherein each first bus is configurable as one of a row bus or a column bus, and each second bus is configurable as one of the row bus and the column bus;
- a first interface of each tile in an nth row of tiles in the integrated circuit is connected to an nth group of first buses in the N groups of first buses, third interfaces of any two tiles in the nth row of tiles are connected through a third bus, and n is a positive integer greater than or equal to 1 and less than or equal to N;
- and
- a second interface of each tile in an mth column of tiles in the integrated circuit is connected to an mth group of second buses in the M groups of second buses, fourth interfaces of any two tiles in the mth column of tiles are connected through a fourth bus, and m is a positive integer greater than or equal to 1 and less than or equal to M.
An integrated circuit, comprising:
- a kernel circuit;
- a switching circuit;
- a first interface;
- a second interface;
- a third interface;
- and
- a fourth interface;
- wherein the kernel circuit comprises a fifth interface, a sixth interface, and a seventh interface;
- and
- wherein the switching circuit is configured to:
- control one of the fifth interface and the sixth interface to be connected to the first interface;
- control the other of the fifth interface and the sixth interface to be connected to the second interface;
- and
- control one of the third interface and the fourth interface to be connected to the seventh interface.
Dependencies are inferred from the claim text.