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US 2023/0418745 A1Published application
Technique to enable simultaneous use of on-die sram as cache and memory
AssigneeAdvanced Micro Devices, Inc.
InventorsChintan S. Patel, Vydhyanathan Kalyanasundharam, Benjamin Tsien, Alexander J. Branover
Life of this patent
Estimating the term…
Abstract
A technique for operating a cache is disclosed. The technique includes utilizing a first portion of a cache in a directly accessed manner; and utilizing a second portion of the cache as a cache.
Claims20
A method for operating a cache, the method comprising:
- utilizing a first portion of a cache in a directly accessed manner;
- and
- utilizing a second portion of the cache as a cache.
A system, comprising:
- a cache;
- and
- a processor configured to access data stored in the cache,
- wherein the cache is configured such that the accesses from the processor utilize a first portion of the cache in a directly accessed manner and utilize a second portion of the cache as a cache.
1 more element
A system, comprising:
- a cache;
- and
- a plurality of clients configured to access data stored in the cache,
- wherein the cache is configured such that the accesses from the plurality of clients utilize a first portion of the cache in a directly accessed manner and utilize a second portion of the cache as a cache.
1 more element
Dependencies are inferred from the claim text.