Error recovery and power management between nodes of an interconnection network

A computer system that enables packet recovery from an error condition, said computer system comprising:

• one or more processors;
• and
• one or more hardware storage devices that store instructions that are executable by the one or more processors to cause the computer system to:
• cause a data stream to include packets of different data types, including a first data type and a second data type;
• generate a first data type packet;
• selectively impose error correcting code (ECC) on the first data type packet, the ECC enabling errors that occur in the first data type packet to be corrected using data in the first data type packet;
• transmit the first data type packet using the data stream;
• generate a second data type packet;
• and
• transmit the second data type packet using the data stream.

A method for recovering packet data from an error condition, said method comprising:

• causing a data stream to include one or more packets of a first data type and one or more packets of a second data type;
• generating a first data type packet;
• selectively imposing error correcting code (ECC) on the first data type packet, the ECC enabling errors that occur in the first data type packet to be corrected using data in the first data type packet;
• transmitting the first data type packet using the data stream;
• generating a second data type packet;
• and
• transmitting the second data type packet using the data stream.