Semiconductor devices and methods for increased capacitance
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-You Tai, Sung-Hsin Yang, Tsung Jing Wu, Jung-Chi Jeng, Ling-Sung Wang, Ru-Shang Hsiao
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Abstract
Semiconductor devices having increased capacitance without increased fin height or increased chip area are disclosed. Grooves are formed across a width of the fin(s) to increase the overlapping surface area with the gate terminal, in particular with a length of the groove being less than or equal to the fin width. Methods of forming such grooved fins and semiconductor capacitor devices are also described.
Claims20
A method for forming a semiconductor capacitor device, comprising:
- receiving a substrate with at least one fin;
- applying a mask with a pattern across a width of the at least one fin;
- and
- etching the at least one fin to form at least a first groove across the width of the at least one fin;
- removing the mask;
- and
- forming a first gate stack in the first groove of the at least one fin.
A method for forming a semiconductor capacitor device, comprising:
- applying a first mask with a pattern to a substrate, wherein the first mask pattern comprises a spacer line that includes at least one gap, wherein a length of each gap is less than or equal to a width of the spacer line;
- etching the substrate to form a fin with at least one groove across the width of the fin;
- and
- removing the first mask.
A method for forming a semiconductor device that includes two separate transistors having different capacitances, comprising:
- receiving a substrate having at least one fin that extends across a capacitor region and a normal region;
- depositing an STI layer over the fin;
- applying a mask to the normal region;
- etching the STI layer such that a depth of the STI layer in the capacitor region is different from a depth of the STI layer in the normal region;
- forming a first gate stack over the fin in the capacitor region;
- forming a second gate stack over the fin in the normal region;
- depositing a dielectric layer between the first gate stack and the second gate stack to obtain the two separate transistors having different capacitances.
Dependencies are inferred from the claim text.