Semiconductor device and manufacturing method thereof

A device comprising:

• a gate structure over a substrate;
• a nanostructure embedded in the gate structure;
• a first top source/drain structure and a second top source/drain structure connected to the nanostructure and on opposite sides of the gate structure;
• a sidewall spacer adjacent to the first top source/drain structure and comprising:
• a bottom dielectric layer;
• and
• a top dielectric layer over the bottom dielectric layer;
• and
• a spacer residue between the sidewall spacer and the first top source/drain structure, wherein the spacer residue is directly over the bottom dielectric layer.

A method comprising:

• forming a fin structure over a substrate, wherein the fin structure comprises a sacrificial layer and a channel layer over the sacrificial layer;
• forming a dummy gate structure over the fin structure;
• forming a sidewall spacer on a sidewall of the fin structure, wherein the sidewall spacer comprises a first dielectric layer and a second dielectric layer outside the first dielectric layer;
• removing a portion of the fin structure such that a remaining portion of the fin structure is under the dummy gate structure;
• etching back the first dielectric layer of the sidewall spacer such that the second dielectric layer of the sidewall spacer protrudes from the first dielectric layer;
• epitaxially growing a source/drain structure over the substrate and in contact with the channel layer of the remaining portion of the fin structure;
• and
• replacing the dummy gate structure and the sacrificial layer with a metal gate structure.