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US 2023/0411477 A1Published application
Stepped source drain contact for gate-all-around transistor
AssigneeInternational Business Machines Corporation
InventorsSu Chen Fan, Nicolas Jean Loubet, Yann Mignot, Tsung-Sheng Kang, Eric Miller
Life of this patent
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Abstract
A gate-all-around transistor structure including a channel region surrounded on three sides by a gate conductor, and a pair of salicide regions extending from opposite ends of the channel region in a direction parallel with the gate conductor.
Claims20
A gate-all-around transistor structure comprising:
- a channel region surrounded on three sides by a gate conductor;
- and
- a pair of salicide regions extending from opposite ends of the channel region in a direction parallel with the gate conductor.
A gate-all-around transistor structure comprising:
- a plurality of channel regions surrounded on three sides by a gate conductor;
- and
- a plurality of salicide regions extending from opposite ends of the plurality of channel regions in a direction parallel with the gate conductor.
A gate-all-around transistor structure comprising:
- a plurality of nanosheet channel regions surrounded on three sides by a gate conductor;
- and
- a pair of salicide regions extending from opposite ends of each of the plurality of channel regions in a direction parallel with the gate conductor, wherein each pair of salicide regions extend different distances from the opposite ends of each of the plurality of channel regions.
Dependencies are inferred from the claim text.