Logic circuit and semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei YAMAZAKI, Jun KOYAMA, Masashi TSUBUKU, Kosei NODA
Life of this patent
Estimating the term…
Loading patent…
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei YAMAZAKI, Jun KOYAMA, Masashi TSUBUKU, Kosei NODA
Estimating the term…
To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.