Chip-first layered packaging architecture

An interposer, comprising:

• an organic dielectric material having a first surface and an opposing second surface;
• a first plurality of bond-pads on the first surface;
• a second plurality of bond-pads on the second surface;
• TDVs between the first plurality of bond-pads and the second plurality of bond-pads;
• and
• one or more IC dies in the organic dielectric material,
• wherein:
• the first surface is in direct contact with another IC die,
• the TDVs are in direct contact with the first plurality of bond-pads and the second plurality of bond-pads.

A method of fabricating an interposer, the method comprising:

• providing one or more known good IC dies (KGDs) having first bond-pads;
• attaching the KGDs to a carrier;
• encapsulating the KGDs with an organic dielectric material;
• forming conductive pillars on a first subset of the first bond-pads, wherein the first bond-pads in the first subset have a first pitch;
• attaching another KGD to a second subset of the first bond-pads, wherein the first bond-pads in the second subset have a second pitch smaller than the first pitch;
• encapsulating the conductive pillars and the another KGD with the organic dielectric material;
• planarizing a surface of the organic dielectric material;
• and
• forming second bond-pads on the planarized surface of the organic dielectric material.