Bonding defect detection for die-to-die bonding in memory devices

A semiconductor device comprising:

• a memory device that includes:
• a plurality of bit lines connected to a plurality of memory cells;
• a pre-charge circuit that is configured to pre-charge a first bit line among the plurality of bit lines with a first voltage and pre-charge a second bit line with a second voltage that is lower than the first voltage;
• and a sense amplifier that is configured to amplify a voltage difference between the first bit line and the second bit line and output the amplified voltage difference;
• and
• a memory controller that is configured to determine whether bonding of the plurality of memory cells is defective based on the output from the sense amplifier.

A semiconductor device comprising:

• a memory cell;
• a page buffer;
• a first switch having a first end that is connected with the memory cell at a first node and a second end that is connected with the page buffer at a second node;
• a second switch that is connected between a power source configured to supply a pre-charge voltage and the first node;
• and
• a third switch connected between the power source and the second node,
• wherein the page buffer comprises:
• a latch;
• and
• a transistor that is connected between an input terminal of the latch and a ground terminal, and having a gate connected to the second node.