Under drive control circuit and semiconductor apparatus including the under drive control circuit
AssigneeSK hynix Inc.
InventorsHyung Jin CHOI, Gwi Han KO, Chan Hui JEONG
Life of this patent
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Abstract
The present technology may include a voltage generation circuit configured to generate a plurality of voltages in response to at least one voltage control signal, and control logic configured to generate the at least one voltage control signal in order to adjust at least one of an under drive time and an under drive offset during an under drive operation of a semiconductor apparatus according to a temperature information signal and a pre-stored temperature characteristic signal of the semiconductor apparatus.
Claims23
An under drive control circuit comprising:
- a voltage generation circuit configured to generate a plurality of voltages in response to at least one voltage control signal;
- and
- control logic configured to generate the at least one voltage control signal in order to adjust at least one of an under drive time and an under drive offset during an under drive operation of a semiconductor apparatus according to a temperature information signal and a pre-stored temperature characteristic signal of the semiconductor apparatus.
An under drive control circuit comprising:
- a voltage generation circuit configured to generate a read voltage for a read operation and a verify voltage for a verify operation in response to voltage control signals;
- and
- control logic configured to perform at least one of a word line under drive operation during the read operation and a word line under drive operation during the verify operation according to a temperature information signal and a pre-stored temperature characteristic signal of a semiconductor apparatus, and to generate the voltage control signals in order to adjust at least one of an under drive time and an under drive offset in the at least one word line under drive operation.
A semiconductor apparatus comprising:
- a memory cell array;
- an address decoder connected to the memory cell array through a plurality of word lines, and configured to apply a plurality of voltages to a word line corresponding to a decoded row address among the plurality of word lines;
- and
- an under drive control circuit configured to generate the plurality of voltages in response to voltage control signals, and generate the voltage control signals in order to adjust at least one of an under drive time and an under drive offset during an under drive operation of a semiconductor apparatus according to a temperature information signal and a pre-stored temperature characteristic signal of the semiconductor apparatus.
Dependencies are inferred from the claim text.