Refresh frequency-dependent system-level trimming of verify level offsets for non-volatile memory
AssigneeSanDisk Technologies LLC
InventorsAbhijith Prakash, Xiang Yang
Life of this patent
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AssigneeSanDisk Technologies LLC
InventorsAbhijith Prakash, Xiang Yang
Estimating the term…
A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to word lines. The memory cells are disposed in strings and configured to retain a threshold voltage corresponding to data states. A control means is configured to apply verification pulses of program verify voltages each associated with one of the data states to selected ones of the word lines to determine whether the memory cells connected thereto have the threshold voltage above each of the program verify voltages targeted for each of the memory cells during a program-verify portion of a program operation. The control means is also configured to trim the program verify voltages for each of the data states for a grouping of the memory cells based on quantities of the memory cells having the threshold voltage crossing over between the data states in crossovers in a verify level trimming process.
A memory apparatus, comprising:
A controller in communication with a memory apparatus including memory cells each connected to one of a plurality of word lines and disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states, the controller configured to:
A method of operating a memory apparatus including memory cells each connected to one of a plurality of word lines and disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states, the method comprising the steps of:
Dependencies are inferred from the claim text.