Programming delay scheme for in a memory sub-system based on memory reliability

A method comprising:

• receiving a programming command with respect to a set of memory cells coupled to one or more wordlines of a memory device;
• determining a value of a metric reflecting reliability of the set of memory cells;
• determining a delay based on the value of the metric;
• and
• performing a programming operation with respect to the set of memory cells, wherein the programming operation comprises the delay between a first pass of the programming operation and a second pass of the programming operation.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

• receive a programming command with respect to a set of memory cells coupled to one or more wordlines of a memory device;
• determine a value of a metric reflecting reliability of a subset of the set of memory cells;
• determine a delay based on the value of the metric reflecting reliability;
• and
• perform a programming operation with respect to the subset, wherein the programming operation comprises the delay between a first pass of the programming operation and a second pass of the programming operation.