Dummy cell resistance tuning in nand strings

A method of operating a non-volatile memory array that includes NAND strings, each NAND string including a plurality of data memory cells coupled to a plurality of data word lines in series with a plurality of dummy memory cells connected to a plurality of dummy word lines, the method comprising:

• applying a first dummy word line voltage to one or more dummy word lines of the plurality of dummy word lines in a verify step of a program operation to program the data memory cells;
• and
• subsequently, applying a second dummy word line voltage to the one or more dummy word lines of the plurality of dummy word lines in a read operation to read the data memory cells.

A non-volatile storage device comprising:

• a plurality of NAND strings of memory cells, each NAND string having a plurality of data memory cells coupled to a plurality of data word lines in series with a plurality of dummy memory cells connected to a plurality of dummy word lines;
• and
• means for increasing resistance of one or more dummy memory cells of the plurality of dummy memory cells from a first resistance for program-verify steps directed to the plurality of data memory cells to a second resistance for subsequent read operations directed to the plurality of data memory cells.