Neural processing unit being operated based on plural clock signals having multi-phases

A system-on-chip (SoC) comprising:

• a semi-conductor substrate;
• a first circuitry, disposed on the semi-conductor substrate, including a plurality of processing elements (PEs) configured to perform operations of an artificial neural network model, the plurality of PEs including an adder, a multiplier, and an accumulator;
• and
• a clock signal supply circuitry, disposed on the semi-conductor substrate, configured to output one or more clock signals,
• wherein when the plurality of PEs include a first group of PEs and a second group of PEs, a first clock signal among the one or more clock signals, is supplied to the first group of PEs and a second clock signal among the one or more clock signals, is supplied to the second group of PEs, and
• wherein at least one of the first and second clock signals has a preset phase based on a phase of an original clock signal.

A method of operating a neural processing unit (NPU), comprising:

• generating a plurality of clock signals including a first clock signal and a second clock signal;
• operating a first group of processing elements (PEs) based on the first clock signal;
• and
• operating a second group of PEs based on the second clock signal,
• wherein the PEs of the first and second groups include an adder, a multiplier, and an accumulator, and are configured to process operations of an artificial neural network model.