Namespace change propagation in non-volatile memory devices

A device, comprising:

• memory;
• and
• a controller coupled to the memory and configured to:
• generate, in the memory, a first logical address map and a second logical address map that is identical to the first logical address map;
• identify the first logical address map as active to cause the first logical address map to be loaded in response to a request to load from the memory a map for logical addresses;
• implement one or more changes in the second logical address map while the first logical address map is identified as active;
• and
• identify, after the one or more changes, the second logical address map as active to cause the second logical address map to be loaded in response to a request to load from the memory a map for logical addresses.

A method, comprising:

• generating, by a controller of a device and in memory of the device, a first logical address map and a second logical address map that is identical to the first logical address map;
• identifying the first logical address map as active to cause the first logical address map to be loaded in response to a request to load a map for logical addresses;
• implementing one or more changes in the second logical address map while the first logical address map is identified as active;
• and
• identifying, after the one or more changes, the second logical address map as active to cause the second logical address map to be loaded in response to a request to load a map for logical addresses.

A non-transitory computer storage medium storing instructions which, when executed by a device, cause the device to perform a method, the method comprising:

• generating, by a controller of the device and in memory of the device, a first logical address map and a second logical address map that is identical to the first logical address map;
• identifying the first logical address map as active to cause the first logical address map to be loaded in response to a request to load a map for logical addresses;
• implementing one or more changes in the second logical address map while the first logical address map is identified as active;
• and
• identifying, after the one or more changes, the second logical address map as active to cause the second logical address map to be loaded in response to a request to load a map for logical addresses.