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US 2023/0409242 A1Published application
Storage traffic pattern detection in memory devices
AssigneeLodestar Licensing Group LLC
InventorsLuca Porzio, Roberto Izzi, Nicola Colella, Danilo Caraccio, Alessandro Orlando
Life of this patent
Estimating the term…
Abstract
A processing device of a memory sub-system can monitor a plurality of received commands to identify a forced unit access command. The processing device can identify a metadata area of the memory device based on the forced unit access command. The processing device can also perform an action responsive to identifying a subsequent forced unit access command to the metadata area.
Claims20
A system comprising:
- a memory device;
- a controller coupled to the memory device and configured to:
- receive a plurality of commands;
- identify a received command of the plurality of commands whose corresponding data is written directly to the memory device bypassing a cache;
- determine a metadata area of the memory device based on the identifying of the received command whose corresponding data is written to the memory device bypassing the cache;
- and
- responsive to determining that a start logical block address (LBA) and an end LBA for a different write command is contiguous with a start LBA and an end LBA of the metadata area, update the start LBA and the end LBA of the metadata area to include the start LBA and the end LBA of the different write command.
4 more elements
A method comprising:
- determining a candidate journal area;
- receiving a command at a memory sub-system;
- determining that the received command is a write command associated with writing data to a memory device of the memory sub-system without first writing the data to a cache;
- determining that a start LBA and an end LBA for the write command is contiguous with a start LBA and an end LBA of the candidate journal area;
- responsive to determining that the received command is the write command associated with writing the data to the memory device without first writing the data to the cache and determining that the start LBA and the end LBA for the write command is contiguous with the start LBA and the end LBA of the candidate journal area, updating the start LBA and the end LBA of the candidate journal area to include the start LBA and the end LBA of the write command.
2 more elements
A system comprising:
- a memory device;
- a controller coupled to the memory device and configured to:
- determine a start logical block address (LBA) and an end LBA of a metadata area of the memory device;
- determine that a start LBA and an end LBA for an access command, from a plurality of access commands, is contiguous with the start LBA and the end LBA of the metadata area;
- responsive to determining that the start LBA and the end LBA of the access command is contiguous with the start LBA and the end LBA of the metadata area, determine that the access command is associated with writing data to the memory device without first writing the data to a cache;
- and
- responsive to determining that the access command is associated with writing data to the memory device without first writing data to the cache, update the start LBA and the end LBA of the metadata area to include the start LBA and the end LBA of the access command.
4 more elements
Dependencies are inferred from the claim text.