Back to results
US 2023/0409204 A1Published application
Random reads using multi-port memory and on-chip memory blocks
AssigneeXilinx, Inc.
InventorsAbhishek Kumar JAIN, Henri FRAISSE, Dinesh D. GAITONDE
Life of this patent
Estimating the term…
Abstract
A method includes receiving a value and an identifier from a first memory and hashing the identifier to produce a memory block identifier. The method also includes routing, based on the memory block identifier, a read request to a memory block of a plurality of memory blocks and updating the value received from the first memory based on a property received from the memory block in response to the read request. The memory further includes storing the updated value in the first memory.
Claims20
A method comprising:
- receiving a first value and an associated first identifier from a first memory;
- hashing the first identifier to produce a memory block identifier for a memory block of a second memory;
- routing, based on the memory block identifier, a read request to the memory block of the second memory;
- receiving a property from the memory block of the second memory based on the read request;
- updating the first value received from the first memory based on the received property;
- and
- storing the updated first value in the first memory.
4 more elements
An apparatus comprising:
- a first memory;
- a second memory comprising a plurality of memory blocks, wherein the second memory is separate from the first memory;
- and
- a hardware processor communicatively coupled to the first and second memories, the hardware processor configured to:
- receive a first value and an associated first identifier from the first memory;
- hash the first identifier to produce a memory block identifier for selecting a memory block of the second memory;
- route, based on the memory block identifier, a read request to the memory block of the second memory;
- receive a property from the memory block of the second memory based on the read request;
- update the first value received from the first memory based on the received property;
- and
- store the updated first value in the first memory.
8 more elements
A system comprising:
- a first memory configured to store values and associated identifiers;
- a second memory comprising a plurality of memory blocks, wherein the second memory is separate from the first memory;
- and
- a hardware processor communicatively coupled to the first and second memories, the hardware processor configured to:
- hash a source identifier received from the first memory to produce a memory block identifier for selecting a memory block of the second memory;
- route, based on the memory block identifier, a read request to the memory block of the second memory;
- receive a property from the memory block of the second memory based on the read request;
- update the first value received from the first memory based on the received property;
- and
- store the updated first value in the first memory.
7 more elements
Dependencies are inferred from the claim text.