Storing misaligned reference pixel tiles

An apparatus for encoding or decoding (coding) video data, comprising:

• a memory;
• and
• one or more processors coupled to the memory, the one or more processors configured to:
• determine a first codec region associated with a first block to be coded, the first codec region being one of a plurality of codec regions of a frame, wherein each codec region among the plurality of codec regions of the frame is independently codable;
• determine whether reference pixels of a first version of a pixel tile were stored in a cache while coding one or more blocks from a second codec region, wherein the cache is hosted locally on a chip of a hardware coder, and wherein the pixel tile corresponds to a location within the frame;
• based on determining whether the reference pixels of the first version of the pixel tile were stored in the cache while coding the one or more blocks from the second codec region, determine whether to read the first version of the pixel tile from the cache or retrieve a second version of the pixel tile from a memory device that is external to the chip of the hardware coder, wherein the second version of the pixel tile comprises reference pixels from the first codec region that are not in the first version of the pixel tile;
• and
• code the first block associated with the first codec region based at least partly on the first version of the pixel tile read from the cache or the second version of the pixel tile retrieved from the memory device.