Semiconductor integrated circuit, phase locked loop (pll) circuit, and system

Abstract

A semiconductor integrated circuit includes an oscillation circuit and first and second current control circuits. The oscillation circuit includes a first series circuit having inverters, including a first inverter, connected in series and a second series circuit having inverters, including a second inverter, connected in series. An oscillation signal is output from the first series circuit. The first current control circuit is connected between a current source and an output terminal of the first inverter and configured to control a current from the current source into the first series circuit in accordance with a first signal synchronized with a clock signal. The second current control circuit is connected between an output terminal of the second inverter and a reference voltage node and configured to control a current from the second series circuit to the reference voltage node in accordance with a second signal synchronized with the clock signal.

Dependencies are inferred from the claim text.