Semiconductor package and manufacturing method of semiconductor package
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsien-Wei Chen, Meng-Liang Lin, Kuan Liang Liu, Shin-Puu Jeng
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsien-Wei Chen, Meng-Liang Lin, Kuan Liang Liu, Shin-Puu Jeng
Estimating the term…
A semiconductor package includes an interconnect structure, a plurality of dies disposed on the interconnect structure in a side-by-side manner, an underfill filling between the interconnect structure and the plurality of dies and filling a lower part of a gap between adjacent two of the plurality of dies, a conductive layer at least covering back surfaces of the adjacent two of the plurality of dies and filling an upper part of the gap, and an encapsulating material laterally encapsulating the plurality of dies and the conductive layer.
A semiconductor package, comprising:
A semiconductor package, comprising:
A manufacturing method of a semiconductor package, comprising:
Dependencies are inferred from the claim text.