Signal conducting line arrangements in integrated circuits

A method comprising:

• fabricating gate-conductors extending in a second direction intersecting a semiconductor structure at channel regions of transistors, wherein the second direction is perpendicular to a first direction;
• depositing a first insulating material covering the semiconductor structure and the gate-conductors;
• depositing a first metal layer over the first insulating material and patterning the first metal layer to form horizontal conducting lines extending in the first direction;
• fabricating a first pin-connector and a second pin-connector passing through a second insulating material overlying the first metal layer;
• and
• depositing a second metal layer over the second insulating material and patterning the second metal layer to form vertical conducting lines extending in the second direction, wherein a first vertical conducting line is aligned with a first gate-conductor underneath and directly connected to a first horizontal conducting line through the first pin-connector, and wherein a second vertical conducting line is aligned with a vertical boundary of a circuit cell and directly connected to a second horizontal conducting line through the second pin-connector.

A method comprising:

• fabricating two dummy gate-conductors intersecting a semiconductor structure extending in a first direction and fabricating a gate-conductor intersecting the semiconductor structure at a channel region of a transistor, wherein the gate-conductor extending in a second direction is between the two dummy gate-conductors extending in the second direction which is perpendicular to the first direction;
• depositing a first insulating material covering the semiconductor structure, two dummy gate-conductors and the gate-conductor;
• depositing a first metal layer over the first insulating material and patterning the first metal layer to form horizontal conducting lines extending in the first direction;
• depositing a second insulating material overlying the first metal layer;
• and
• depositing a second metal layer over the second insulating material and patterning the second metal layer to form vertical conducting lines extending in the second direction, wherein a first vertical conducting line is aligned with the gate-conductor underneath and directly connected to a first horizontal conducting line through a first pin-connector, and wherein a second vertical conducting line is aligned with one of the two dummy gate-conductors and directly connected to a second horizontal conducting line through a second pin-connector.