Managing Data Refresh in Semiconductor Devices

A semiconductor device comprising:

• a memory cell array having a plurality of blocks, each block comprising multiple pages;
• and
• one or more integrated circuits coupled to the memory cell array and configured to:
• read specific data from a page of a block in the memory cell array,
• perform a logic operation on the specific data in the page to obtain a logic operation result,
• count a number of bits having a specific value among the logic operation result,
• determine whether the number of bits is within a data refresh criterion for the page, and
• in response to determining that the number of bits is outside of the data refresh criterion, generate a data refresh warning message for the page in the block.

A method comprising:

• reading specific data from a page of a block in a memory;
• performing a logic operation on the specific data in the page to obtain a logic operation result;
• counting a number of bits having a specific value among the logic operation result;
• determining whether the number of bits is within a data refresh criterion for the page;
• and
• in response to determining that the number of bits is outside of the data refresh criterion, generating a data refresh warning message for the page in the block.