Transconductance amplifier of high linearity and common-mode rejection

A transconductance amplifier comprising a first MOS (metal-oxide semiconductor) transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a source degeneration network, wherein:

• a gate, a source, and a drain of the first MOS transistor connect to a first node, a third node, and a fifth node, respectively;
• a gate, a source, and a drain of the second MOS transistor connect to a second node, a fourth node, and a sixth node, respectively;
• a gate, a source, and a drain of the third MOS transistor connect to the fifth node, a DC (direct-current) node, and the third node, respectively;
• a gate, a source, and a drain of the fourth MOS transistor connect to the sixth node, the DC node, and the fourth node, respectively;
• and
• the source degeneration network is placed across the third node and the fourth node and comprises a parallel connection of a source resistor, a fifth MOS transistor controlled by a first voltage at the first node, and a sixth MOS transistor controlled by a second voltage at the second node.