Semiconductor structure and manufacturing method of the same

A semiconductor memory structure, comprising:

• an insulation layer;
• a bottom electrode via in the insulation layer;
• a barrier layer comprising a first portion surrounding the bottom electrode via and a second portion over the bottom electrode via, wherein the second portion of the barrier layer comprises a concaved recess;
• and
• a magnetic tunneling junction (MTJ) over the bottom electrode via.

A semiconductor structure, comprising:

• an insulation layer;
• a bottom electrode via in the insulation layer;
• a bottom electrode over the bottom electrode via;
• an magnetic tunneling junction (MTJ) over the bottom electrode;
• and
• a sidewall spacer in direct contact with a sidewall of the MTJ, wherein a bottom portion of the sidewall spacer is at a level below a bottom surface of the bottom electrode.