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US 2023/0275136 A1Published application
Low-k Feature Formation Processes and Structures Formed Thereby
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWan-Yi Kao, Chung-Chi Ko
Life of this patent
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Abstract
Embodiments of the present disclosure relate to a method of forming a low-k dielectric material, for example, a low-k gate spacer layer in a FinFET device. The low-k dielectric material may be formed using a precursor having a general chemical structure comprising at least one carbon atom bonded between two silicon atoms. A target k-value of the dielectric material may be achieved by controlling carbon concentration in the dielectric material.
Claims20
A semiconductor device comprising:
- a gate electrode over a semiconductor fin over a substrate;
- and
- a spacer located adjacent to the gate electrode, wherein at least a portion of the spacer has a density of between about 1 g/cm3 and 3 g/cm3, a non-zero carbon concentration less than about 30 at.% and a non-zero nitrogen concentration of less than about 3 at.%.
A semiconductor device comprising:
- a dielectric material over a semiconductor fin over a substrate, the dielectric material having a density of between about 1 g/cm3 and 3 g/cm3, a non-zero carbon concentration less than about 30 at.% and a non-zero nitrogen concentration of less than about 3 at.%;
- a gate dielectric adjacent to the dielectric material;
- and
- a gate electrode adjacent to the gate dielectric.
1 more element
A semiconductor device comprising:
- a gate structure over a semiconductor fin;
- a gate contact adjacent to the gate structure;
- and
- at least one dielectric material located between the gate structure and the gate contact, the at least one dielectric material having a density of between about 1 g/cm3 and 3 g/cm3, a non-zero carbon concentration less than about 30 at.% and a non-zero nitrogen concentration of less than about 3 at.%.
1 more element
Dependencies are inferred from the claim text.